Glossary of Wafer Probing Terms and Acronyms

Term	Definition
I over F (1/f)	1/ƒ noise occurs in almost all electronic devices (referred to as flicker noise). When designing or working with circuits for use with extremely weak (low level) signals, noise is an important consideration. As the switching voltage on devices reduces, the percentage of this signal become larger. Flicker noise is more prominent in FETs and bulky resistors. A "real world" amplifier will not only amplify the noise at its input, but will contribute its own noise to the signal. In devices such as hearing aids, this noise creates a popping sound not unlike the sound of popping corn.
3D Packaging	3D packaging involves two or more components stacked vertically in a package in order to achieve a higher level of integration while using a smaller footprint. The integrated components may be either stacked packages or stacked chips. In the latter case, the chips are either wire-bonded along their edges or interconnected by way of Through-Silicon Via (TSV) technology.
A
Accelerated Lifetime Test (ALT)	Accelerated Lifetime Testing stresses devices beyond actual operating conditions to physically and / or chronologically accelerate any potential causes of degradation. In this way, device lifetime and failure rates can be determined, and failure mechanisms can be analysed. This type of test is referred to as an accelerated lifetime test. Such tests are used to shorten the evaluation period and analyse mechanisms in detail.
Accuracy	Determined on one axis of motion by moving a specified distance and then measuring how accurately the device moved that distance. E.g. Direct a move in “X” of 15mm. Actual movement is 15.001mm. Accuracy would be ± 0.001mm
AM 1	The air mass 1 spectrum of a light source is equivalent to that of sunlight at the earth's surface when the sun is at zenith.
Amperometric Sensor	A heterogeneous electron transfer as a result of an oxidation / reduction of an electro-active species at a sensing electrode surface. A current is measured at a certain imposed voltage of the sensing electrode with respect to the reference electrode. Analytical information is obtained from the current-concentration relationship at that given applied potential.
Anechoic Chamber	A test chamber that performs 2 basic functions as part of an overall EMC (electromagnetic-compatibility) measurement system. They shield the DUT from ambient signals and absorb reflected signals generated inside the chamber.
Anode	The electrode in an electrochemical cell or galvanic couple that experiences oxidation, or gives up electrons.
Arrhenius Equation	In accelerated lifetime modelling, when the stress parameter is the temperature, the acceleration factor may follow an Arrhenius equation where the acceleration factor is proportional to exp(-Ea/kT) with Ea being the activation energy, k the Boltzmann constant and T the temperature.
ASIC	Application Specific Integrated Circuit
Assembly Test Chip	A chip designed to evaluate the reliability and effect of assembly materials and processes, usually by electrical measurements made on terminals connected to the chip within the packages that are tested. The test chip may contain a variety of sensors to evaluate thermo-mechanical stresses, moisture, and other associated degradations.
Atomic Force Microscope (AFM)	An instrument that allows for the measurement and high resolution mapping of both conducting and non-conducting surfaces. The instrument operates by scanning the sample with a sharp tip (typically micro-machined silicon nitride) attached to the underside of a microscale cantilever.
Automated Optical Inspection (AOI)	Systems for inspecting electronic circuits (products, assemblies), identifying defects during the manufacturing cycle. CCD cameras are used to capture images which are compared to the characteristics of known good products, facilitating the identification of problems and allowing repair at earliest point and the lowest possible cost. Similar to WIS.
Automated Test Equipment (ATE)	Automatic Test Equipment - Equipment designed to automatically analyse functional or static parameters of electronic assemblies in order to evaluate performance degradation. It may also be designed to perform fault isolation.
B
Balanced Input	A differential input circuit pair with equal impedance to ground on each side. See Differential Input. The advantage over single-ended transmission is noise rejection over long distances of cabling.
Balanced Output	A differential output circuit pair with equal source impedance on each side. See Differential Output.
Ball Grid Array or Bumped Grid Array (BGA)	A surface mount microelectronic package that uses an array of solder balls to provide electrical interconnect and physical mount to the next level of package such as a printed circuit board.
Bandwidth	The measure of a circuit’s ability to pass a full amplitude signal over a range of signal frequencies. Normally measured between the point or points where the signal amplitude falls to -3dB below the pass band frequency.
Bipolar Junction Transistor (BJT)	A three-terminal electronic device constructed of doped semiconductor material and may be used in amplifying or switching applications. Bipolar transistors are so named because their operation involves both electrons and holes. Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a junction between two regions of different charge concentrations.
BLP	Bottom lead packages
BNC	A type of coaxial connector used in situations requiring shielded cable for signal connections and / or controlled impedance applications.
Breakdown	Failure of a material resulting from an electrical overload. The resulting damage may be in the form of thermal damage (melting or burning) or electrical damage (loss of polarisation in piezoelectric materials).
Burn-in	The process of electrically stressing a device, usually at an elevated temperature and voltage environment, for an adequate period of time in order to force component infant mortality failures or other latent defects before the unit is delivered to a customer. (See WLR.)
C
C4	Controlled Collapsed Chip Connection
C5	Controlled Collapsed Chip Carrier Connection
Calibration	A process of adapting a sensor output to a known physical quantity to improve sensor output accuracy.
Cathode	The electrode in an electrochemical cell or galvanic couple at which a reduction reaction occurs; in other words the electrode receiving electrons from an external circuit.
Cap Wafer	A wafer that is bonded to a device wafer intended to provide encapsulation to the devices.
Ceramic Ball Grid Array (CBGA)	Integrated circuit package in which the input and output points are solder bumps arranged in a grid or area array pattern. CBGA devices utilise ceramic materials because of their low loss qualities, long life characteristics, and ability to withstand high operating temperatures and heat shock. For general application, the aluminium oxide (alumina) substrate is preferred because of its availability, low cost, good thermal expansion coefficient to most inks. Beryllia substrates with a high thermal conductivity may be used in high power circuitry.
CCA	Circuit Card Assembly
CCAPS	Circuit Card Assembly and Processing System
CCGA	Ceramic Column Grid Array
Column Grid Array (CGA)	An integrated circuit package in which the input and output points are high temperature solder cylinders or columns arranged in a grid pattern.
Channel Crosstalk	Coupling of a signal from one channel to another or any other output by conduction or radiation. Crosstalk is expressed in decibels (dB) at a specified load impedance and over a specific frequency range or ranges.
Chip	An uncased and normally leadless form of a microelectronic component that is either passive or active, discrete or integrated. It is the square or rectangular portion of a wafer sectioned from the wafer when the wafer processing is completed. Also referred to as a die. A chip is not ready for use until packaged and provided with external connectors.
Chip Scale Package (CSP)	A single-die, direct surface mountable package with an area of no more than 1.2 X the original die area. CSPs are constructed from individual die with lead frame or substrates and are also fabricated at the wafer level. CSPs have the advantage of small size, low mass, reduced electrical parasitics and they can be fully tested.
Chip-On-Board (COB)	A hybrid technology exclusively employing face-up-bonded chip devices interconnected to the substrate conventionally, i.e., by flying wires. A generic term for mounting an unpackaged silicon die directly onto the PCB. Connections are usually made by wire bonding.
Coaxial Cable	A cable that has one conductor (shield) completely surrounding the other (centre conductor), the two being coaxial and separated by an insulator. Standard industry types have a braided shield, or a semi-rigid copper or stainless steel shield material. Braided shield coaxial cable offers more physical flexibility but less shielding.
Cold Switching	Closing the relay contacts before applying voltage and current, plus removing voltage and current before opening the contacts (Contacts do not make or break current.). Larger currents may be carried through the contacts without damage to the contact area since contacts will not arc when closed or opened.
Contact Resistance	Excess electrical resistance in series with the bulk conductor resistance of two contacting electrical conductors arising from the nature of contact geometry and properties of the contact surfaces.
Crosstalk	The undesirable interference caused by the coupling of energy between signal paths.
Cross-sensitivity	The influence of one measurement on the sensitivity of another measurement.
CV / IV	CV (capacitance vs. voltage) and IV (current vs. voltage) measurements. Capacitance-Voltage (CV) measurement is one of the very basic measurements that can be done to characterise semiconductor devices. What is normally done is the device is hooked up to the parametric analyser instrument and CV graphs are plotted. With that data we can conclude the type of device, whether it’s a p type or an n type device and many other parameters. The main aim of the CV measurement is to extract the doping information of the diode.
D
Direct Chip Attachment (DCA)	Techniques for connecting electronic integrated circuits to PCB's or substrates without the use of additional P/I structure such as wirebonds or leadframes. This includes packages commonly referred to as Flip Chip.
Die	An uncased and normally leadless form of a microelectronic component that is either passive or active, discrete or integrated. It is a square or rectangular portion of a wafer sectioned from the wafer when the wafer processing is completed. Also referred to as a chip.
Dielectric	Any material that is electrically insulating.
Dielectric Breakdown Strength	The magnitude of an electric field necessary to cause significant current passage through a dielectric material.
DIN	Does not specify any particular connector only that it meets a standard.
Dual In-line Package (DIP)	A type of package with two rows of leads extending at right angles from the base and having standard spacing between leads and between rows of leads. DIP is a through-hole mounting package. DIPs can be made of ceramic and plastic, referring to as CERDIP and PDIP respectively.
DPM	Defects per Million
Drift	Gradual departure of the instrument output from the calibrated value. An undesired slow change of the output signal.
DSP	Double-side prober or Digital Signal Processing
DUT	Device Under Test
Dynamic characteristics	A description of an instrument's behaviour between the time a measured quantity changes value and the time the instrument obtains a steady response.
Dynamic error	The error that occurs when the output does not precisely follow the transient response of the measured quantity.
Dynamic range	The ratio of the largest to the smallest values of a range, often expressed in decibels.
E
Electric Field [V/m]	In simplest form, the potential difference between two points divided by the distance between the two.
Electrical Breakdown	Condition in which, particularly with high electric field, a nominal insulator becomes electrically conducting.
Electroluminescence	In electrical engineering: the emission of visible light by a p-n junction across which a forward-biased voltage is applied. In electrochemistry: emission of light by a molecule which is being reduced or oxidised on a biased electrode. If the exciting cause is a photon, rather than an electron, the process is called photoluminescence. This is the theory behind Emission microscopy.
Electrolyte	A solution through which an electric current may be carried by the motion of ions.
Electromagnetic Interference (EMI)	A term that defines unwanted electromagnetic radiation from a device that could interfere with desired signals in test or communication equipment. RFI (Radio Frequency Interference) and EMI are often used interchangeably.
EOT	End of Test
Encapsulation	Sealing up or covering a circuit or electromechanical element for mechanical and environmental protection.
Electrostatic Discharge (ESD)	The transfer of electrostatic charge between bodies (materials, components, etc.) at different electrostatic potentials caused by direct contact or induced by an electrostatic field.
F
FA	Failure Analysis
F-type Connector	A threaded medium performance coaxial signal connector typically used in consumer applications (TVs and VCRs). This connector is typically usable as high as 1GHz. It is inexpensive since the pin of the connector is actually the centre conductor of the coaxial cable.
Forced Air Convection (FAC)	A type of reflow oven in which the principle heat transfer mechanism is convection, though some IR (infrared) conduction may be present. Also known as forced convection.
Failure Mechanism	A physical, chemical or other process that leads to failure. Some examples of failure mechanisms in MEMS include: stiction, creep, fatigue, wear, dielectric charging and breakdown.
Failure Mode	A failure mode is the manner whereby a failure is observed. Generally, it describes the way in which the failure happens and its impact on device or system operation.
Failure Mode and Effect Analysis (FMEA)	A systematic method for evaluating potential product or process failure modes and their impact on the product or process. FMEA is normal done on a form which facilitates the prioritisation and management of remedial actions to reduce the occurrence of failure modes or minimise their effects.
FAR	Failure Analysis Report
Fatigue	Used to describe the failure of any structure caused by repeated application of stress over a period of time.
FCC	Flat Conductor Cable
Flip Chip in Package (FCIP)	An IC package in which the die is interconnected to the lead structure of the package as a Flip Chip.
Field Effect Transistor (FET)	The FET relies on an electric field to control the shape and hence the conductivity of a channel of one type of charge carrier in a semiconductor material. FETs are sometimes called unipolar transistors to contrast their single-carrier-type operation with the dual-carrier-type operation of bipolar (junction) transistors (BJT).
Flip Chip	A leadless, monolithic structure containing microelectronic elements that is designed to electrically and mechanically interconnect to a base material through the use of conductive bumps located on its face.
Floating	The condition where a common mode voltage exists, or may exist, between earth ground and the instrument or circuit of interest. Low side of circuit is not at earth potential.
Fibre Optic Operational Wavelengths (FOOW)	850 nm - multimode fibre 1310 nm - multi and single mode fibre 1550 nm - single mode long haul and transoceanic fibre 1625 nm - proposed for in-service monitoring
Forward Bias	The conducting bias for a p-n junction rectifier that assures electron flow to the n side of the junction.
Frequency Spectrum	Relationships and Typical Applications 108 nm - 3 x 109 Hz (microwave radio frequencies) 109 nm - 3 x 108 Hz (UHF frequencies) 1010 nm - 3 x 107 Hz (VHF frequencies) 3 x 1011 nm - 1000 kHz (AM Broadcast radio frequencies) 1014 nm - 3000 Hz (audio frequencies) 5 x 1015 nm - 60 Hz (electrical power frequency)
H
HALT	Highly Accelerated Life Testing
HF	High Frequency
I
I/O	Input/Output
IC	Integrated Circuit
In-Circuit Test (ICT)	A component-by-component test to verify proper component placement and orientation and to ensure that components meet specifications.
Insulated Gate Bipolar Transistor (IGBT)	A three-terminal power semiconductor device, noted for high efficiency and fast switching. It switches electric power in many modern appliances: electric cars, variable speed refrigerators, air-conditioners, and even stereo systems with switching amplifiers. Since it is designed to rapidly turn on and off, amplifiers that use it often synthesize complex waveforms with pulse width modulation and low-pass filters.
Insulation Resistance	The Ohmic resistance of insulation. It degrades quickly as humidity increases. Lower insulation resistance provides a path for leakage current to ground. This is very critical when making measurements on semiconductor components where picoamp measurements are being made.
Interposer	An intermediate layer in packaging, used for purposes such as fanning out or matching electrical interconnects from one device to another, or relieving any potential stress issues.
Infrared (IR)	Part of the electromagnetic spectrum between the visible light range and the radar range. Used for heating operations in electronic assembly such as reflow soldering, preheating in wave soldering, etc.
K
Ka-band	The Ka band (Pronounced: "Kay-A Band") covers the frequencies of 26.5 - 40 GHz. The Ka band is part of the K band of the microwave band of the electromagnetic spectrum. This symbol refers to "K-above" - in other words, the band directly above the K-band. The so-called 30/20 GHz band is used in communications satellites, uplink in either the 27.5 GHz and 31 GHz bands, and high-resolution, close-range targeting radars aboard military airplanes. Some frequencies in this radio band are used for vehicle speed detection by law enforcement.
K-type Connector	A small type of threaded coaxial signal connector typically used in higher frequency applications. This connector is typically usable as high as 40GHz. It may be mated by an SMA connector with much lower performance.
KGB	Known Good Board
KGD	Known Good Die
kV	Kilovolts
L
Latching	In relay or switching technology, this refers to the ability to keep the contact status in place even if power is removed from the equipment.
Latch-up	A failure condition in which a transistor switches state when it is not supposed to. Often caused by nearby circuitry in a specific condition.
Leakage Current	Error current that can degrade sensitive measurements. Even high resistance paths between low current conductors and nearby voltage sources can generate significant leakage currents. Leakage in insulating material, micro-contamination on insulating surfaces, and moisture (humidity) can have catastrophic effects on picoamp and sub-picoamp (femtoamp) measurements.
LGA	Land Grid Array
LOC	Lead on Chip
LSI	Large Scale Integration
LWD	Long Working Distance (Objectives)
Low Level Measurements	Low-level measurements in research, metrology, nanotechnology, superconductivity, and other low-voltage and low resistance applications require a special breed of test equipment.
M
Matrix	An arrangement of signal circuits in which input buses are represented by parallel vertical lines and output buses as overlapping horizontal lines (or vice versa), forming a grid-like array. Crosspoint switches at each crossing point connect inputs to outputs. Also referred to as a switching array, or crosspoint switch. (As in switching matrix).
Multi-Chip Module (MCM)	A circuit comprised of two or more silicon devices (IC) mounted directly to a substrate within a single component package.
Multi-Chip Package (MCP)	A small enclosed module with an external form factor that matches a single chip package and typically contains two to five chips. MCPs are commonly low lead count combinations of simple IC's.
Mean Time To Failure (MTTF)	MTTF is a characterization of reliability for non-repairable systems. It is the mean time expected until the first failure of a part of the system. MTTF is a statistical value and is supposed to be the mean over a long period of time and large number of units.
Mean Time Between Failure (MTBF)	A theoretical period of time between failures in equipment based on stresses in environment, temperature, levels of quality and other parameters.
Mean Time To Repair (MTTR)	A theoretical period of time needed to repair a piece of equipment given certain circumstances.
MELF	Metal Electrode Leadless Face
Micro Electro Mechanical Systems (MEMS)	The technology of the very small, and merges at the nano-scale into nano electro mechanical systems (NEMS) and nanotechnology.
MLB	Multi-Layered Board
Multi-Layered Printed Wiring Board (MLPWB)	A multi-layer board formed by sequentially laminating single and double sided circuit panels (interlayers). The interlayers are interconnected with interstitial via holes and / or through-hole connections.
Monolithic Microwave Integrated Circuits (MMIC)	A type of integrated circuit (IC) device that operates at microwave frequencies (300 MHz to 300 GHz).
N
Noise	Any unwanted electronic signal, or an unwanted audible sound (from fans or cooling devices).
O
OE	Opto-Electronic
OLB	Outer Lead Bonding
Open-Cavity Package (OCP)	Packages that have been fabricated in advance with an open cavity to accept a MEMS or IC chip as a fast turn-around and cost-effective packaging solution for prototyping, sampling, and low-volume production. Open access to the chip within the package enables special inspection, testing, probing, and even repair. OCP options include QFP, BGA and other package types which match the standard packages from those families.
P
P/I	Packaging and Interconnection
Path Resistance	The resistance of a complete signal path, including the switching element's contact resistance, any PC board circuit resistance and connector terminal resistance and / or cabling. Also see Contact Resistance.
Piezoelectric Currents	The current caused by mechanical stress to the insulating materials or connectors. To minimise this problem in low current or voltage measurements, the stress must be removed from the insulators, and materials with a low piezoelectric effect must be used.
Propagation Delay	The specified amount of time for a signal to pass through a previously closed signal path. The delay must be considered, for example, when the signal is used to synchronize other signals, or is being used in a Clock / Data configuration. This is due to both the electrical length of the signal path, and any active components in the signal path.
PAC	Pad Array Carrier
Passivation	The formation of an insulation layer over the surface of a microelectronic element to serve as a barrier to further oxidation or corrosion. It also protects the surface from contaminants, moisture, or particles.
PBGA	Plastic Ball Grid Array
PCB	Printed Circuit Board
PCBA	Printed Circuit Board Assembly
PCH	Probe Card Holder
PGA	Pin Grid Array
Pin to Pad	A process that automatically aligns a probe card to the DUT. Required for vertical probe card technologies.
Pin-Out	For electronic components, a diagram showing the relations between connecting pins and internal components.
Platen	The flat surface of the prober used to mount individual manipulators or a probe card.
PLCC	Plastic Leaded Chip Carrier
Pick and Place (PNP)	A programmable machine usually utilising a robot arm which picks up components from an automatic feeder, moves to a specified location on a carrier, wafer frame or PCB, and places or inserts the component onto or into the correct location.
Probe Card	A probe card is an interface between an electronic test system and a semiconductor wafer or other device. Its purpose is to provide an electrical path between the test system and the circuits on the wafer, thereby permitting the testing and validation of the circuits at the wafer level, usually before they are diced and packaged. It consists, normally, of a printed circuit board (PCB) and some form of contact elements, usually metallic, but possibly of other materials as well. Probe cards are broadly classified into needle type, vertical type, and MEMS (Micro Electro-Mechanical System) type depending on shape and forms of contact elements. MEMS type is the most advanced technology currently available. The most advanced type of probe card currently can test an entire 12" wafer with one touchdown.
Probe System for Life (PS4L)	A unique modular system for configuring and upgrading test systems.
PWB	Printed Wiring Board
Process Window Index (PWI)	A versatile indicator of the robustness of a process, by calculating, on a percentage scale, how the entire process is operating relative to all applicable Specification Limits. This indicates how much deviation in the process can occur before defects are generated.
Q
Quality Factor (Q-factor)	A figure of merit for assessing the performance or quality of a resonator, the quality factor is a measure of energy loss or dissipation per cycle as compared to the energy stored in the fields inside the resonator. It is defined as the ratio of the reactance to the effective series resistance of a component at resonance. For example, a MEMS resonator with a high Q-factor has a sharp, large magnitude, well-defined peak in the resonance curve.
Quad Flat Package (QFP)	A microelectronic package with leads extending from each of its four sides. It is used primarily for surface mounting and its variations include Low-Profile QFP (LQFP) and Thin QFP (TQFP).
R
Repeatability	Repeatability is the ability of the device to move from any position to an exact designated point. The error in movement is Repeatability error.
Resolution	Resolution is the smallest incremental step size the device is capable of moving. Ex: If the stage on a prober is capable of moving 1cm or greater the resolution is said to be 1cm.
RF	Radio Frequencies
Return Loss	A measure of the undesirable signal reflections from an imperfectly-terminated transmission line. Expressed in dB. Also see VSWR.
S
Scanning Probe Microscope (SPM)	Creates images of two dimensional surfaces by scanning a sharp tip (the probe) over a surface.
Scanning Tunnelling Microscope (STM)	A type of SPM able to image and topographically map, to atomic accuracy, surfaces that conduct electricity.
Spurious-Free Dynamic Range (SFDR)	SFDR is a specification for an ADC used in a communications application. The SFDR of an ADC is defined as the ratio of the rms signal amplitude to the rms value of the peak spurious spectral content (measured over the entire first Nyquist zone, dc to fs/2). SFDR is generally plotted as a function of signal amplitude and may be expressed relative to the signal amplitude (dBc) or the ADC full-scale (dBFS).
Sheet Resistance	The electrical resistance of thin sheet of a material with uniform thickness as measured across opposite sides of a unit square pattern. It is expressed in ohms per square.
SIR	Surface Insulation Resistance
Settle Time	The time required for establishing relay connections and stabilising user circuits. For relay contacts, this includes contact bounce.
SMB/SMC	Types of small coaxial signal connectors typically used in high frequency applications. SMC threads to the mating connector while the SMB snaps to the mating connector.
Shielding	A metal enclosure or gasket for a circuit, or a metal shield surrounding wire conductors (coaxial or triaxial cable), to lessen interference, interaction, or current leakage. The shield is usually grounded.
Signal to Noise Ratio (SNR)	Signal-to-noise ratio (often abbreviated SNR or S/N) is an electrical engineering measurement, also used in other fields (such as scientific measurement or biological cell signalling), defined as the ratio of a signal power to the noise power corrupting the signal. A ratio higher than 1:1 indicates more signal than noise.
Spectral Resolution	The capability of an optical system to distinguish different frequencies.
System-on-Chip (SoC)	A large, complex silicon integrated-circuit with high functionality and performance. Often characterised by the presence of embedded processors, memory, and a multiple number of other components
System-on-Package (SoP)	Refers to the integration of a wide variety of component types (such as RF, digital, analog, optical and MEMS) in one package to achieve system-level functions. It uses thin-film component technology and is often built on a multi-layer package substrate by lateral and vertical integration to achieve a multi-function system-level package. It goes further than System-in-Package (SiP) by incorporating multi-domain components based on materials beyond silicon. It can include systems-on-chips (SoC), SiP, multi-chip module (MCM) and 3D chip-stacking for both IC and package integration as well incorporate multi-domain devices such as sensors, optoelectronics, RF and MEMS (including Bio-MEMS, microfluidics, etc) components for system level integration.
System-in-Package (SiP)	SiP refers to multiple silicon chips enclosed in a single package or module to perform essentially the functions of a system. Examples of chips integrated in the package include processors, memories, wireless communications, RF-MEMS and discrete passive components. SiPs are typically used inside a mobile phone, digital music player, etc.
Stage	The motion control system for moving a wafer chuck, packaged part holder or microscope on a probe station. Stages may offer X, Y, Z and Theta control.
SOIC	Small Outline Integrated Circuit
SSMA	Micro-miniature coaxial connectors with excellent electrical performance up to 26 GHz.
Surface Mount Assembly (SMA)	A small type of threaded coaxial signal connector typically used in higher frequency applications. This connector is typically usable to 26GHz.
T
TBGA	Tape Ball Grid Array
TNC	A threaded type of BNC coaxial connector.
Triaxial Cable	A cable with three conductors: one conductor surrounded by an inner shield and an isolated outer shield. Generally, the inner shield is connected to a guard potential and the outer shield to signal LOW or ground.
Trigger	An external stimulus that initiates one or more instrument functions. Trigger stimuli include: a front panel button (TAKE), an external input voltage pulse.
TSSOP	Thin Shrink Small Outline Package
Twinaxial Cable	A cable with three conductors: one twisted pair of conductors surrounded by an outer shield.
TSOP	Thin Small Outline Package
U
UUT	An abbreviation for Unit Under test. Also see DUT (Device Under Test).
ULWD	Ultra Long Working Distance (Objectives)
V
Voltage Standing Wave Ratio (VSWR)	The loss due to the mismatch introduced into the signal by the load or source signal path characteristics. Expressed as a ratio of the highest voltage to the lowest voltage found in the signal. Also expressed as Return Loss in dB. The Return Loss expression is the more modern term.
W
Wafer	A thin, circular piece of silicon, glass, sapphire or other substrate material onto which the integrated circuits or MEMS devices are fabricated. A wafer normally consists of an array of multiple devices which is referred to as a chip, or die, after separation from the wafer.
WIS	Wafer Inspection System (also known as AOI)
Wafer-Level Chip-Scale Package (WLCSP)	WLCSPs are chip-scale microelectronic packages that are processed at the wafer level to form a fine-pitch I/O format which can be tested and surface mounted on a printed circuit board. For example, in one approach, a dielectrically-isolated redistribution layer connected to the die pads is created on the wafer and followed by the formation of solder ball bond pads, resulting in a package very close to the size of the silicon die.
Wafer-Level Packaging (WLP)	The technology of packaging an integrated circuit or a MEMS device at wafer level as oppose to the traditional packaging of individual device after wafer dicing. WLP accomplishes device interconnection and protection at wafer level involving processes such as interconnect redistribution layer, bumping, encapsulated metal conductors or wire bonding, through-silicon-via, wafer bonding, etc. WLP for MEMS such as imaging sensors and micro-mirror arrays has potential for cost reduction, size shrinkage and performance enhancement.
Wafer Level Reliability (WLR)	A process for determining the expected life cycle of a product while that product is still on the wafer. This improves reliability time to data to quickly isolate any product exhibiting a high infant mortality rate.
Y
Yield	A measure of manufacturing efficiency expressed as the percentage of acceptable production units obtained from a specified manufacturing process. For example, die yield is the percentage of acceptable die compared to the total number of die on a processed wafer.

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Author

Date

Version

Author

Chris Valentine

Date

08 June 2020

Version

IKB043 Rev. 1

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Author Biography

Chris is a Technical Sales Engineer at Inseto, responsible for both front-end equipment and wafers projects within the company.

After completing his undergraduate studies at the University of Glasgow achieving a first class M.Sci Physics degree, Chris moved to Cambridge to pursue further study achieving an M.Res in Sensor Technologies in 2016. He then spent a further 3 years developing scalable carbon nanotube based sensors and electrochemical devices, publishing a papers on this topic and on energy storage applications. As a researcher Chris focussed on wafer level fabrication, characterisation and test, focussing on the use of contact lithography to pattern the catalysts with which he grew carbon nanotubes.

Chris joined Inseto in 2019 as a sales engineer, initially with a focus on front end equipment. Within Inseto his responsibilities have expanded to include wafer materials, as well as a wider range of equipment within the broader semiconductor and microelectronics industry.